Dr. Peiyi Zhao

Dr. Peiyi Zhao

Associate Professor
Electrical Engineering and Computer Science, Fowler School of Engineering
Office Location: Keck Center for Science and Engineering Swenson Hall N325
Scholarly Works:
Digital Commons
Education:
Zhejiang University, Bachelor of Science
The University of Louisiana At Lafayette, Ph.D.

Biography

Dr. Zhao's research interests center around energy-efficient Register files, machine learning accelerators for AI applications using approximate computing, and computing in memory, based on his extensive research on flip-flop/latch design. He is using 22nm technology in his research. He has served as an NSF panelist several times since 2023. More information about his research can be found here.

Keywords
low power digital integrated circuits, flip-flop, leakage, clock gating, sub-threshold

Recent Creative, Scholarly Work and Publications

Zisong Wang, Peiyi Zhao, Tom Springer, Congyi Zhu, Jaccob Mau, Andrew Wells, Yinshui Xia, and Lingli Wang “Low Power Redundant-Transition-Free TSPC Dual-Edge-Triggering Flip-Flop using Single-Transistor-Clocked Buffer”, IEEE Transaction on VLSI, vol. 31, no. 5, pp. 706-710, May 2023
A. Samiee, P. Borulkar, R. F. DeMara, P. Zhao and Y. Bai, "Low-Energy Acceleration of Binarized Convolutional Neural Networks Using a Spin Hall Effect Based Logic-in-Memory Architecture," in IEEE Transactions on Emerging Topics in Computing, vol. 9, no. 2, pp. 928-940, 1 April 2021